Elementz AVR Jtag ICE for AVR hardware debugging
AVR Jtag ICE enables AVR based ICs to be debugged using hardware breakpoints. The JTAG interface is a 4-wire Test Access Port (TAP) controller that is compliant with the IEEE 1149.1 standard. The IEEE standard was developed to enable a standard way to efficiently test circuit board connectivity (Boundary Scan). Atmel AVR devices have extended…